M.Tech I and II semester results announced for all regions.
Receipt of application forms for RV/RT/PC from the CANDIDATE along with Demand Draft for the requisite fee at the respective colleges for I & II Sem. M.Tech. on or before 08 April 2008.
Results can be accessed from the sidebar on the right if the VTU site doesnt respond... Other wise use the alternate vtu results sidebar...
B.E./B.Tech I and II semester results announced for Belgaum, Gulbarga and Mysore Region
B.E./B.Tech I and II semester Bangalore region results will be announced on 29-03-2008
| EVENT | LAST DATE |
| Receipt of application forms for RV/RT/PC from the CANDIDATE along with Demand Draft for the requisite fee at the respective colleges for I & II Sem. B.E/B.Tech. on or before | 09 April 2008 |
| Receipt of application forms for RV/RT/PC from the CANDIDATE along with Demand Draft for the requisite fee at the respective colleges for VII & VIII Sem. B.E/B.Tech. on or before | 08 March 2008 |
| The schedule for filling application forms (in triplicate) for Callenge Valuation of answer scripts of I / II / III and IV semester MBA Examinations held during Dec.2007 / Jan. 2008 at the respective colleges is | 20 March 2008 |
| Receipt of application forms for RV/RT/PC from the CANDIDATE along with Demand Draft for the requisite fee at the respective colleges for V & VI Sem. B.E/B.Tech. on or before | 12 March 2008 |
| Receipt of application forms for RV/RT/PC from the CANDIDATE along with Demand Draft for the requisite fee at the respective colleges for III and IV sem B.E/B.Tech. on or before | 25 March 2008 |
B.E./B.Tech I and II semester results announced for Belgaum and Gulbarga Region
B.E./B.Tech I and II semester Mysore region results will be announced on 28-03-2008
B.E./B.Tech I and II semester Bangalore region results will be announced on 29-03-2008
Sl. No. | B.E. / B. Tech. Course | Download Scheme and Syllabus |
1 | Aeronatical Engineering | Scheme / Syllabus |
2 | Biomedical Engineering | Scheme / Syllabus |
3 | Bio - Technology | Scheme / Syllabus |
4 | Civil Engineering | Scheme / Syllabus V, VI, VII, VIII |
5 | Electronics and Communication Engineering | Scheme / Syllabus RFIC, ACS, V, VI, VII, VIII |
6 | Environmental Engineering | Scheme / Syllabus V, VI, VII, VIII |
7 | Industrial and Production Engineering | Scheme / Syllabus |
8 | Industrial Engineering and Management | Scheme / Syllabus |
9 | Instrumentation Technology | Scheme / Syllabus |
10 | Mechanical Engineering | Scheme / Syllabus V, VI, VII, VIII |
11 | Medical Electronics | Scheme / Syllabus |
12 | Mining Engineering | Scheme / Syllabus |
13 | Silk Technolgoy | Scheme / Syllabus |
14 | Telecommunication Engineering | Scheme / Syllabus |
15 | Textile Technology | Scheme / Syllabus |
* | Master of Business Administration | Scheme / Syllabus / Regulations |
Draft Syllabus of M.Tech. Courses
Sl. No. | M. Tech. Courses | Download Scheme and Syllabus |
1 | Computer Aided Design of Structures | |
2 | Construction Technology | Scheme / Syllabus |
3 | Highway Technology | Scheme / Syllabus |
4 | Hydrolics | Scheme / Syllabus |
5 | Structural Engineering | Scheme / Syllabus |
6 | Transportation Engineering | Scheme / Syllabus |
7 | Environmental Engineering | Scheme / Syllabus |
8 | Chemical Engineering | Scheme / Syllabus |
9 | Polymer Science | Scheme / Syllabus |
10 | Textile Technology | Scheme / Syllabus |
11 | Digital Communication Engineering | |
12 | Digital Communication and Networking | |
13 | Digittal Electronics | |
14 | Digittal Electronics and Communication | |
15 | Digittal Electronics and Communication Systems | |
16 | Electronics | |
17 | Industrial Electronics | |
18 | Information and Communication System | |
19 | Network and Internet Engineering | |
20 | Power Electronics | |
21 | VLSI Design and Embedded Systems | |
22 | Bio-Medical Electronics and Industrial Instrumentation | Scheme / Syllabus |
23 | Bio-Medical Signal Processing and Instrumentation | Scheme / Syllabus |
24 | Manufacturing Science and Engineering | Scheme / Syllabus |
25 | Master of Engineering Management | |
26 | Product Design and Manufacturing | |
27 | Production Engineering and System Technology | Scheme / Syllabus |
28 | Production Engineering | Scheme / Syllabus |
29 | Production Management | Scheme / Syllabus |
30 | Production technology | Scheme / Syllabus |
31 | Industrail Structures | Scheme / Syllabus |
Question:i am studing in sct,banglore.so my native is hassan.so can i join for malnad college at hassan for 5th sem.
Answer: The option of lateral entry exisits in 3rd semester. Talk to the principal of the college you want to join to know if thats is possible.
Question:May I Know is there any possible in reduction of marks after revaluation in the vtu.Some one told it may be possible.Can u tell me the exact answer as last date is on 25th march 2008.Do u have any example of such cases?.Waiting for urgent reply.
Answer: According to rules of the Revaluation process the marks won't be decreased during revaluation. The exact rules are given below:
I. REVALUATION :
A candidate can apply for revaluation of the answer scripts within 2 weeks from the date of announcement of results. The prescribed fee, at present, is Rs. 500 /- per paper. The applications for revaluation in the prescribed forms are to be submitted in the college with the prescribed fee within 2 weeks from the date of announcement of the results. All the applications of revaluation submitted in the college are to be countersigned by the Principal and a record of the applications is to be maintained in the college for future reference. The Principal shall send all the applications in one lot along with the D.D. for the prescribed fee to the Regional Office.
After the receipt of the applications for re-totaling and for revaluation in the Regional Office, the concerned officials appointed by the Registrar Evaluation on the recommendations of the Regional Director or In-Charge Special Officer shall pull out answer scripts of the candidates who have applied for re-totaling and revaluation. After completion of the re-totaling of answer scripts, the answer scripts, which are to be sent for revaluation, will be given new code numbers and title page of the answer script is either detached or completely masked by pasting paper. Answer scripts, after given the new code numbers and after masking the markings made by the Ist examiner, will be kept ready for revaluation. The answer scripts for revaluation will be sent to a place of valuation or the examiners are called to the examination centre as per the direction of the Vice-Chancellor. The re-valuation marks shall be entered in a separate facing sheet supplied by the University for each answer script. The examiner will be supplied with the original scheme of valuation for the subject and all the marks shall be entered in to a separate marks list for all the revalued scripts.
a) If the re-valuation marks are less than the original marks, then the original marks shall be retained.
b) The candidate is given the benefit of the revaluation marks in full if the difference between the original marks and re-valuation marks is 5% or within 5% of the maximum marks.
c) When the difference between the original marks and the re-valuation marks is above 5 and equal to or below 15 of the maximum marks, the first five marks are given in full and only 50% of the remaining excess marks will be added to the marks of the candidate. Any fraction of a number is rounded to the next full integer.
d) The average of the marks of nearest two valuations shall be considered as the marks secured by the candidate. However, if one of the three marks falls exactly midway between the other two, then the higher two marks shall be taken for averaging. If there is any change in the marks after the revaluation, corrected statement of marks card shall be issued to the candidate.
B.E. / B. Tech. Model Question Papers | ||
B.E. / B. Tech. courses | Subject code | Download |
Mechanical Sciencec | Common for the following courses
| |
| Mining Engineering | ||
Biomedical Engineering | ||
| Engineering Mathematics and Biostatics | ||
| B.E. Electronics and Communication Engineering / Telecommunication Engineering / Medical Electronics | ||
| B.E. Civil Science | Common for the following courses
| |
| Ciramics and Ciment Tech. | ||
Plymer science and Technology | ||
| Chemical Engineering | ||
| Textile Technology | Common for silk technology | |
| Computer Science and Engineering / Information Science and Engineering | ||
| Biotechnology | ||
B.E./B.Tech IV semester results announced for all regions. results can be accessed on the sidebar. All the best!!!
B.E. III semester results announced for all region. The fourth semester results can be expected on Monday. The results can be accessed from the form on the right sidebar if the VTU page does not respond. All the best!!!
B.E. III semester results announced for Gulbarga region. The remaining region and fourth semester results can be expected soon as we have already entered the process of declaring the results. The results can be accessed from the form on the right sidebar. All the best!!!
1. What is the difference between a latch and a flip flop. For the same input, how would the output look for a latch and for a flip-flop.
2. Finite state machines:
(2.1)Design a state-machine (or draw a state-diagram) to give an output '1' when the # of A's are even and # of B's are odd. The input is in the form of a serial-stream (one-bit per clock cycle). The inputs could be of the type A, B or C. At any given clock cycle, the output is a '1', provided the # of A's are even and # of B's are odd. At any given clock cycle, the output is a '0', if the above condition is not satisfied.
(2.2). To detect the sequence "abca" when the inputs can be a b c d.
3. minimize a boolean expression.
4. Draw transistor level nand gate.
5. Draw the cross-section of a CMOS inverter.
6. Deriving the vectors for the stuck at 0 and stuck at 1 faults.
7. Given a boolean expression he asked me to implement just with muxes but nothing else.
8. Draw Id Vds curves for mosfets and explain different regions.
9. Given the transfer characteristics of a black box draw the circuit for the black box.
10. Given a circuit and its inputs draw the outputs exact to the timing.
11. Given an inverter with a particular timing derive an inverter using the previous one but with the required timing other than the previous one.
12. Change the rise time and fall time of a given circuit by not changing the transistor sizes but by using current mirrors. 13. Some problems on clamping diodes.
These are some of the questions asked by Microsoft.
(I feel that these type of questions are asked even in Electrical Engineering interviews. Make sure you browse them.)
1. Given a rectangular (cuboidal for the puritans) cake with a rectangular piece removed (any size or orientation), how would you cut the remainder of the cake into two equal halves with one straight cut of a knife ?
2. You're given an array containing both positive and negative integers and required to find the sub-array with the largest sum (O(N) a la KBL).
Write a routine in C for the above.
3. Given an array of size N in which every number is between 1 and N, determine if there are any duplicates in it. You are allowed to destroy the array if you like.
4. Write a routine to draw a circle (x ** 2 + y ** 2 = r ** 2) without making use of any floating point computations at all.
5. Given only putchar (no sprintf, itoa, etc.) write a routine putlon the prints out an unsigned long in decimal.
6. Give a one-line C expression to test whether a number is a power of 2. [No loops allowed - it's a simple test.]
7. Given an array of characters which form a sentence of words, give an efficient algorithm to reverse the order of the words (no characters) in it.
8. How many points are there on the globe where by walking one mile south, one mile east and one mile north you reach the place where you started.
9. Give a very good method to count the number of ones in a 32 bit number. (caution: looping through testing each bit is not a solution)
10. What are the different ways to say, the value of x can be either a 0 or a 1. Apparently the if then else solution has a jump when written
out in assembly.
if (x == 0)
y=0
else
y =x
There is a logical, arithmetic and a datastructure soln to the above
problem.
Logic design:
1. Draw the transistor level CMOS #input NAND or NOR gate.After drawing it lot of qestions on that ckt will be asked.
2. Transistor sizing for given rise time and fall time. How do you size it for equal rise and fall time.
3. Given a function whose inputs are dependent on its outputs. Design a sequential circuit.
4. Design a finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1.
5. Given a boolean equation minimize it.
6. Given a boolean equation draw the transistor level minimum transistor circuit.
7. What is the function of a D-flipflop, whose inverted outputs are connected to its input ?
8. What will you do if you want to drive a large capacitance ?
Layout related questions:
1. asked me to layout the 3 input nand gate.
2. Later he asked me to modify it to consume as much less space as
we can.
3. He also asked me about the transistor sizing.
1. He asked me to draw the cross section of an inverter and asked me
to show all the capacitances on it and reason for those capacitances.
2. Describe the latchup effect.
3. More about the tristate buffers.
3. What will be the voltage at the output node of a triostate buffer
in its high impedence state. He gave a waveform for the input and
asked me to draw the output waveform for that.
4. Posed a lot of questions on charge sharing problems and keeper
circuits.
5. Asked me to draw the Id Vds curves for mosfet. Asked me to
explain the regions and some couses for that curve like channel
width modulation.
6. He asked me about the electron migration effect and methods to
avoid it.
7. Asked me to draw the dynamic logic of a particular gate and then
posed lots of tricky questions from the previous discussion.
8. He asked me to draw the 6 transistor contemporary sram cell and asked
me to explain how the reading and writing is done in it.
9. Something about trip point.
Computer Architecture Questions:
1. Explain what is DMA?
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